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A systematic analog verification methodology is a huge differentiator in the design of today's complex consumer electronic IC's.

Summit Lake, near Agnew Pass on the Pacific Crest Trail

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Learn about our Analog Verification products. They can dramatically improve your ability create and maintain models and testbenches for you analog circuits.

What Do We Do?

We are a company that specializes in transitioning analog design companies, large and small, to analog verification.

What Is Analog Verification?

Analog Verification, also known as Analog/Mixed-Signal Verification or AMS Verification, is a new methodology for performing functional verification on complex analog, mixed-signal, and RF integrated circuit designs.

Who Needs Analog Verification?

Everyone designing complex integrated circuits that include any type of analog circuitry (analog, mixed-signal, RF, and MEMS) needs analog functional verification.

Why Now?

Compared to what was common just a few years ago, analog and mixed-signal designs have become quite complex, particularly with the move to deep submicron CMOS. Today, analog designs generally have hundreds of modes and thousands of settings. They implement sophisticated algorithms and operate in close cooperation with the digital portion of the design. The dominant risk with these designs is not that they miss their performance requirements, which while unpleasant is generally not fatal to the product. Rather, the real risk is that they not function at all, which often is fatal to the product, and sometimes fatal to the company. Having your chip, or significant portions of your chip, fail to operate is much more of a risk these days because the functional complexity of the design acts to hide errors.

Do I Need Analog Verification?

My designers tell me we are covered. Should I believe them?

Ask yourself the following questions: Is there someone that you trust that can answer the question “Is this chip going to work?” Has every single mode and setting been checked? Have the thousands of tests required to verify the design been run since the last change was made to the design database? Have all the analog blocks been verified to work together? Has the analog section been verified to work with the digital section? Is the person giving the go ahead for tape out on the analog section and mixed-signal interface accountable to the answer? If you cannot say yes to all these questions, then you need analog verification.

What Are the Benefits?

An analog functional verification methodology provides several very important benefits:

  • Confidence that the functional errors in the analog portion of your chip have been found and removed before you release to manufacturing.
  • An efficient and fully verified Verilog model of the analog section of your design that can be used by the digital verification team to verify the entire chip.
  • A comprehensive suite of tests that can be quickly run after any change to the design. In this way, those last minute changes will not put the chip at risk.

How Do We Verify a Design?

You cannot hope to fully verify a modern analog SoC using transistor-level simulation exclusively, no matter how fast the simulator. Instead, our approach is to break the mixed-signal portion of the design into blocks, build models for each block and thoroughly test each model against the corresponding circuit, and then combine all the models and use them to thoroughly test the design. Since we are verifying functionality, we only need functional models of the block. This makes them easy to write, and they run thousands of times faster than if we had to simulate using transistors. The tests we write are fully self checking, meaning that they run thousands of test vectors through the design, and check to assure the response is as expected without user intervention. The result is a simple pass-fail report for all of the tests. These regression tests can be run nightly to ensure that the models and schematics are always consistent, and to ensure that the design is functionally correct.

How Do We Verify a Design?

Analog Verification is still very new. Very few people are familiar with it, and even fewer can actually drive the successful adoption of the methodology. We have a great deal of experience doing both. We’ve applied the methodology on many different types of designs and we make it our job to refine and improve the methodology. Even if you are familiar with analog verification, it is likely we can still help.

How Do We Help You?

We can verify the chip for you; we can develop your ability to verify your designs; or we can provide some combination.

What Are The Challenges?

Read on ...
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